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1 C3M0065100K rev. c, 07-2018 C3M0065100K silicon carbide power mosfet c3m tm mosfet technology n-channel enhancement mode features ? new c3m tm sic mosfet technology ? optimized package with separate driver source pin ? 8mm of creepage distance between drain and source ? high blocking voltage with low on-resistance ? high-speed switching with low capacitances ? fast intrinsic diode with low reverse recovery (q rr ) ? halogen free, rohs compliant beneits ? reduce switching losses and minimize gate ringing ? higher system eficiency ? reduce cooling requirements ? increase power density ? increase system switching frequency applications ? renewable energy ? ev battery chargers ? high voltage dc/dc converters ? switch mode power supplies package part number package marking C3M0065100K to-247-4 C3M0065100K v ds 1000 v i d @ 25?c 35 a r ds(on) 65 m ? maximum ratings (t c = 25 ?c unless otherwise speciied) symbol parameter value unit test conditions note v dsmax drain - source voltage 1000 v v gs = 0 v, i d = 100 a v gsmax gate - source voltage (dynamic) -8/+19 v ac (f >1 hz) note: 1 v gsop gate - source voltage (static) -4/+15 v static note: 2 i d continuous drain current 35 a v gs = 15 v, t c = 25?c fig. 19 22.5 v gs = 15 v, t c = 100?c i d(pulse) pulsed drain current 90 a pulse width t p limited by t jmax fig. 22 e as avalanche energy, single pulse 110 mj i d = 22a, v dd = 50v p d power dissipation 113.5 w t c =25?c, t j = 150 ?c fig. 20 t j , t stg operating junction and storage temperature -55 to +150 ?c t l solder temperature 260 ?c 1.6mm (0.063) from case for 10s note (1): when using mosfet body diode v gsmax = -4v/+19v note (2): mosfet can also safely operate at 0/+15 v drain (pin 1, tab) power source (pin 2) driver source (pin 3) gate (pin 4) downloaded from: http:///
2 C3M0065100K rev. c, 07-2018 electrical characteristics (t c = 25?c unless otherwise speciied) symbol parameter min. typ. max. unit test conditions note v (br)dss drain-source breakdown voltage 1000 v v gs = 0 v, i d = 100 a v gs(th) gate threshold voltage 1.8 2.1 3.5 v v ds = v gs , i d = 5 ma fig. 11 1.6 v v ds = v gs , i d = 5 ma, t j = 150oc i dss zero gate voltage drain current 1 100 a v ds = 1000 v, v gs = 0 v i gss gate-source leakage current 10 250 na v gs = 15 v, v ds = 0 v r ds(on) drain-source on-state resistance 65 78 m ? v gs = 15 v, i d = 20 a fig. 4, 5, 6 90 v gs = 15 v, i d = 20a, t j = 150oc g fs transconductance 14.3 s v ds = 20 v, i ds = 20 a fig. 7 11.9 v ds = 20 v, i ds = 20 a, t j = 150oc c iss input capacitance 660 pf v gs = 0 v, v ds = 600 v f = 1 mhzv ac = 25 mv fig. 17, 18 c oss output capacitance 60 c rss reverse transfer capacitance 4.0 e oss c oss stored energy 16 j fig. 16 e on turn-on switching energy (body diode fwd) 190 j v ds = 700 v, v gs = -4 v/15 v, i d = 20a, r g(ext) = 2.5?, l= 130 h, t j = 150oc fig. 26 e off turn off switching energy (body diode fwd) 40 t d(on) turn-on delay time 20 ns v dd = 700 v, v gs = -4 v/15 v i d = 20 a, r g(ext) = 2.5 ?, timing relative to v ds inductive load fig. 27 t r rise time 10 t d(off) turn-off delay time 19 t f fall time 8 r g(int) internal gate resistance 4.7 ? f = 1 mhz , v ac = 25 mv q gs gate to source charge 9 nc v ds = 700 v, v gs = -4 v/15 v i d = 20 a per iec60747-8-4 pg 21 fig. 12 q gd gate to drain charge 16 q g total gate charge 35 reverse diode characteristics (t c = 25?c unless otherwise speciied) symbol parameter typ. max. unit test conditions note v sd diode forward voltage 4.8 v v gs = -4 v, i sd = 10 a fig. 8, 9, 10 4.4 v v gs = -4 v, i sd = 10 a, t j = 150 c i s continuous diode forward current 22 a v gs = -4 v note 1 i s, pulse diode pulse current 90 a v gs = -4 v, pulse width t p limited by t jmax note 1 t rr reverse recover time 14 ns v gs = -4 v, i sd = 20 a, v r = 700 v dif/dt = 4500 a/s, t j = 150 c note 1 q rr reverse recovery charge 310 nc i rrm peak reverse recovery current 34 a thermal characteristics symbol parameter typ. max. unit test conditions note r jc thermal resistance from junction to case 0.94 1.1 c/w fig. 21 r ja thermal resistance from junction to ambient 40 downloaded from: http:///
3 C3M0065100K rev. c, 07-2018 0 10 20 30 40 50 60 70 80 0.0 2.5 5.0 7.5 10.0 12.5 15.0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = 150 c tp < 200 s v gs = 7v v gs = 15v v gs = 13v v gs = 11v v gs = 9v 0 20 40 60 80 0.0 2.5 5.0 7.5 10.0 12.5 15.0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = - 55 c tp < 200 s v gs = 7 v v gs = 15 v v gs = 13 v v gs = 11 v v gs = 9 v 0 20 40 60 80 0.0 2.5 5.0 7.5 10.0 12.5 15.0 drain - source current, i ds (a) drain - source voltage, v ds (v) conditions: t j = 25 c tp < 200 s v gs = 7 v v gs = 15 v v gs = 13 v v gs = 11 v v gs = 9 v figure 2. output characteristics t j = 25 oc typical performance figure 5. on-resistance vs. drain current for various temperatures figure 1. output characteristics t j = -55 oc figure 3. output characteristics t j = 150 oc 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 - 50 - 25 0 25 50 75 100 125 150 on resistance, r ds on (p.u.) junction temperature, t j ( c) conditions: i ds = 20 a v gs = 15 v t p < 200 s 0 20 40 60 80 100 120 140 0 10 20 30 40 50 60 on resistance, r ds on (ohms) drain - source current, i ds (a) conditions: v gs = 15 v t p < 200 s t j = 150 c t j = - 55 c t j = 25 c figure 4. normalized on-resistance vs. temperature 0 20 40 60 80 100 120 140 160 - 50 - 25 0 25 50 75 100 125 150 on resistance, r ds on (mohms) junction temperature, t j ( c) conditions: i ds = 20 a t p < 200 s v gs = 15 v v gs = 13 v v gs = 11 v figure 6. on-resistance vs. temperature for various gate voltage downloaded from: http:///
4 C3M0065100K rev. c, 07-2018 typical performance figure 8. body diode characteristic at -55 oc figure 9. body diode characteristic at 25 oc 0 10 20 30 40 50 0 2 4 6 8 10 drain - source current, i ds (a) gate - source voltage, v gs (v) conditions: v ds = 20 v tp < 200 s t j = 150 c t j = - 55 c t j = 25 c - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 drain - source current, i ds (a) drain - source voltage v ds (v) conditions: t j = - 55 c t p < 200 s v gs = - 2 v v gs = - 4 v v gs = 0 v - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 drain - source current, i ds (a) drain - source voltage v ds (v) conditions: t j = 25 c t p < 200 s v gs = - 2 v v gs = - 4 v v gs = 0 v - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 - 10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 drain - source current, i ds (a) drain - source voltage v ds (v) conditions: t j = 150 c t p < 200 s v gs = - 2 v v gs = - 4 v v gs = 0 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 - 50 - 25 0 25 50 75 100 125 150 threshold voltage, v th (v) junction temperature t j ( c) conditons v gs = v ds i ds = 5 ma figure 10. body diode characteristic at 150 oc -4 0 4 8 12 16 0 5 10 15 20 25 30 35 40 gate - source voltage, v gs (v) gate charge, q g (nc) conditions: i ds = 20 a i gs = 100 ma v ds = 700 v t j = 25 c figure 7. transfer characteristic for various junction temperatures figure 11. threshold voltage vs. temperature figure 12. gate charge characteristics downloaded from: http:///
5 C3M0065100K rev. c, 07-2018 typical performance figure 15. 3rd quadrant characteristic at 150 oc figure 13. 3rd quadrant characteristic at -55 oc - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 -8 -7 -6 -5 -4 -3 -2 -1 0 drain - source current, i ds (a) drain - source voltage v ds (v) conditions: t j = - 55 c t p < 200 s v gs = 10 v v gs = 5 v v gs = 15 v v gs = 0 v - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 -8 -7 -6 -5 -4 -3 -2 -1 0 drain - source current, i ds (a) drain - source voltage v ds (v) conditions: t j = 25 c t p < 200 s v gs = 10 v v gs = 5 v v gs = 15 v v gs = 0 v - 80 - 70 - 60 - 50 - 40 - 30 - 20 - 10 0 -8 -7 -6 -5 -4 -3 -2 -1 0 drain - source current, i ds (a) drain - source voltage v ds (v) conditions: t j = 150 c t p < 200 s v gs = 10 v v gs = 5 v v gs = 15 v v gs = 0 v figure 14. 3rd quadrant characteristic at 25 oc 0 5 10 15 20 25 30 35 0 200 400 600 800 1000 stored energy, e oss (j) drain to source voltage, v ds (v) figure 16. output capacitor stored energy figure 17. capacitances vs. drain-source voltage (0 - 200v) 1 10 100 1000 10000 0 50 100 150 200 capacitance (pf) drain - source voltage, v ds (v) c iss c oss conditions: t j = 25 c v ac = 25 mv f = 1 mhz c rss 1 10 100 1000 10000 0 200 400 600 800 1000 capacitance (pf) drain - source voltage, v ds (v) c iss c oss conditions: t j = 25 c v ac = 25 mv f = 1 mhz c rss figure 18. capacitances vs. drain-source voltage (0 - 1000v) downloaded from: http:///
6 C3M0065100K rev. c, 07-2018 10e -3 100e -3 1 1e -6 10e -6 100e -6 1e -3 10e -3 100e -3 1 junction to case impedance, z thjc ( o c/w) time, t p (s) 0.5 0.3 0.1 0.05 0.02 0.01 singlepulse typical performance 0 5 10 15 20 25 30 35 40 - 50 - 25 0 25 50 75 100 125 150 drain - source continous current, i ds (dc) (a) case temperature, t c ( c) conditions: t j 150 c 0 20 40 60 80 100 120 - 50 - 25 0 25 50 75 100 125 150 maximum dissipated power, p tot (w) case temperature, t c ( c) conditions: t j 150 c 0.01 0.10 1.00 10.00 100.00 0.1 1 10 100 1000 drain - source current, i ds (a) drain - source voltage, v ds (v) 100 s 1 ms 10 s conditions: t c = 25 c d = 0, parameter: t p 100 ms limited by r ds on figure 22. safe operating area figure 21. transient thermal impedance (junction - case) 0 50 100 150 200 250 300 0 10 20 30 40 50 switching loss (uj) drain to source current, i ds (a) e off e on e total conditions: t j = 25 c v dd = 500 v r g(ext) = 2.5 ? v gs = - 4v/+15 v fwd = C3M0065100K l = 130 h figure 23. clamped inductive switching energy vs. drain current (v dd = 500v) figure 24. clamped inductive switching energy vs. drain current (v dd = 700v) 0 100 200 300 400 500 0 10 20 30 40 50 switching loss (uj) drain to source current, i ds (a) e off e on e total conditions: t j = 25 c v dd = 700 v r g(ext) = 2.5 ? v gs = - 4v/+15 v fwd = C3M0065100K l = 130 h figure 19. continuous drain current derating vs. case temperature figure 20. maximum power dissipation derating vs. case temperature downloaded from: http:///
7 C3M0065100K rev. c, 07-2018 typical performance 0 100 200 300 400 500 600 0 5 10 15 20 25 switching loss (uj) external gate resistor rg(ext) (ohms) e off e on e total conditions: t j = 25 c v dd = 700 v i ds = 20 a v gs = - 4v/+15 v fwd = C3M0065100K l = 130 h 0 10 20 30 40 0 5 10 15 20 25 switching times (ns) external gate resistor rg(ext) (ohms) t d(off) conditions: t j = 25 c v dd = 700 v i ds = 20 a v gs = - 4v/+15 v fwd = C3M0065100K l = 130 h t r t f t d(on) 0 50 100 150 200 250 300 350 400 0 25 50 75 100 125 150 175 switching loss (uj) junction temperature, t j ( c) e off e on e total conditions: i ds = 20 a v dd = 700 v r g(ext) = 2.5 ? v gs = - 4v/+15 v fwd = C3M0065100K l = 130 h figure 26. clamped inductive switching energy vs. temperature figure 27. switching times vs. r g(ext) figure 25. clamped inductive switching energy vs. r g(ext) figure 28. switching times deinition 0 5 10 15 20 25 30 35 0 20 40 60 80 100 avalanche current (a) time in avalanche t av (us) conditons: v dd = 50 v figure 29. single avalanche soa curve downloaded from: http:///
8 C3M0065100K rev. c, 07-2018 test circuit schematic l q 2 d.u.t q 1 v gs = - 4 v r g r g c dc v dc ks ks figure 30. clamped inductive switching waveform test circuit note (3): turn-off and turn-on switching energy and timing values measured using sic mosfet body diode as shown above. downloaded from: http:///
9 C3M0065100K rev. c, 07-2018 package dimensions package to-247-4l downloaded from: http:///
10 C3M0065100K rev. c, 07-2018 package dimensions package to-247-4l note ; 1. all metal surfaces: tin plated, except area of cut 2. dimensioning & toleranceing confirm to asme y14.5m-1994. 3. all dimensions are in millimeters. angles are in degrees. 4. n is the number of terminal positions downloaded from: http:///
11 11 C3M0065100K rev c, 07-2018 copyright ? 2018 cree, inc. all rights reserved. the information in this document is subject to change without notice. cree, the cree logo, and zero recovery are registered trademarks of cree, inc. cree, inc. 4600 silicon drive durham, nc 27703 usa tel: +1.919.313.5300 fax: +1.919.313.5451 www.wolfspeed.com/power ? rohs compliance the levels of rohs restricted materials in this product are below the maximum concentration values (also referred to as the threshold limits) permitted for such substances, or are used in an exempted application, in accordance with eu directive 2011/65/ ec (rohs2), as implemented january 2, 2013. rohs declarations for this product can be obtained from your cree representative or from the product documentation sections of www.cree.com. ? reach compliance reach substances of high concern (svhcs) information is available for this product. since the european chemical agency (echa) has published notice of their intent to frequently revise the svhc listing for the foreseeable future,please contact a cree represen- tative to insure you get the most up-to-date reach svhc declaration. reach banned substance information (reach article 67) is also available upon request. ? this product has not been designed or tested for use in, and is not intended for use in, applications implanted into the human body nor in applications in which failure of the product could lead to death, personal injury or property damage, including but not limited to equipment used in the operation of nuclear facilities, life-support machines, cardiac deibrillato rs or similar emergency medical equipment, aircraft navigation or communication or control systems, air trafic control systems. notes related links ? spice models: http://wolfspeed.com/power/tools-and-support ? sic mosfet isolated gate driver reference design: http://wolfspeed.com/power/tools-and-support ? sic mosfet evaluation board: http://wolfspeed.com/power/tools-and-support downloaded from: http:///

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